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Altera_Forum
Honored Contributor
Honored ContributorPCIe transmit and receive path latency
Hello everyone, I am trying to figure out how much latency for a certain configuration of the HIP PCIe MegaCore I can expect on both the transmitter and receiver path of an endpoint device. T...
Altera_ForumHonored Contributor
Honored ContributorHi,
I am also interested in this question. I also tested the auto generated 'pcie_core_example_chaining' model in ModelSim, the signals tx_st_data and rx_st_data are changed, but the signals tx_out and rx_in don't change. How can I measured the latency on the PCIe HIP?
