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Let me get back and do some more checking, I was thinking that the reset might be pulled up high at power-on and host asserts the reset once the BIOS chip is powered up and host starts its enumeration sequence. I will check more on the timing aspect of things and get back with more data,
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Its quite possible that is the case, and it would probably be acceptable. Its worth poking around in your hardware to get a sense of what is going on at the system level, and then write your testbenches to match that and several other power-up sequences to see if your design behaves correctly.
Cheers,
Dave
Honored Contributor
