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Altera_Forum
Honored Contributor
13 years agoPCIe transceiver offset cancelation
Device - Stratix IV Using PCIe x4 Gen2. For the purpose of Transceiver offset cancelation I am using the external alt_gx_reconfig. I have been using a PLL output to feed this clock and using th...
Altera_Forum
Honored Contributor
13 years agoHmm.. Something is still wrong. I did create a power on reset type signal internally. I can see in signal tap that the reset to altgx_reconfig block is assserted (see picture) and kept for about 640ns, alt_gx_reconfig_busy is asserted and I also see that it is deasserted later on(not in the picture), dont know after how long(I am going to try to signaltap and see when the pci reset is asserted and when the busy is deasserted).
https://www.alteraforum.com/forum/attachment.php?attachmentid=7016