PCIe pld_clk conflicting coreclkout statements

Hi @corestar,

Thanks for sharing your objective.

My apologies for the delayed response, I took some time to gather the information.

In this case, it is suggested that you drive the pld_clk with coreclkout_hip, as using a single clock simplifies timing.

In the situation that you wish to drive the pld_clk with an other clock source, the following clock frequencies of the clock source could be used:

1.When coreclkout_hip is 62.5 MHz:

Try to use 125 MHz, or 250 MHz.

2. When coreclkout_hip is 125 MHz:

Try to use 250 MHz.

Please note that not all frequencies of other clock source within the specified range can be used to drive the pld_clk.

Thanks.

Best Regards,

VenTingT