Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

PCIe Memory Write Transaction

Hi, I am facing an issue while performing memory write transaction with payload more than 128Bytes from root to endpoint. Write transaction with less than 128Bytes are completed easily. I have ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I see a similar behavior, I try to transfer 128 bytes, but see two bursts, each 64 byte.

My guess is it is related to the cache line size. I have set the max payload size to 512 bytes and expected one 128 byte burst. But I see the two 64 byte bursts.

I use the 64 bit st interface.