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Altera_Forum
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12 years ago

PCIe Legacy Interrupts Not Happening

I have a Cyclone V design built with Qsys (Quartus II 13.0 SP1). The Qsys module has an Avalon-MM bus, a C5 HIP PCIe core and some other blocks connected to PCIe BARs (all 32-bit non-prefetch). The P...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Sure, Lukas!

I have a Qsys subsystem inside my design which contains the PCIe core. Inside that, the altpcie_cv_hip_avmm_hwtcl submodule has a number of parameters/generics. The parameter CG_ENABLE_ADVANCED_INTERRUPT exists in altpcie_cv_hip_avmm_hwtcl and quartus should automatically set it when you select legacy interrupt but it doesn't. You have to manually add the generic both to the component declaration and the generic mapping at the instantiation, in your Qsys module.

Insert into the component declaration:

CG_ENABLE_ADVANCED_INTERRUPT : integer := 0;

Generic mapping:

CG_ENABLE_ADVANCED_INTERRUPT => 1,

I'm guessing you are using VHDL at the top level of your Qsys design. I think people using Verilog at the top level don't have this problem.

Altera's promised to fix this in a future version of Quartus.

I hope this was the problem in your case too and you can fix it, with the above mod.

Sandor