Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi,
Sorry I can't answer your questions (yet). I assume you've compiled this already in ModelSim. Did you get any errors about unconnected ports? Here's what I get when I run runtb.do in ModelSim for QII 9.1: --- Quote Start --- Loading work.altpcierd_write_dma_requester_128# Loading work.altpcierd_read_dma_requester_128# Loading work.altpcierd_cdma_ast_tx_128# Loading work.altpcierd_cdma_ast_rx_128# ** Warning: (vsim-3017) ./pci_test_chaining_testbench.v(655): [TFMPC] - Too few port connections. Expected 116, found 114.# Region: /pci_test_chaining_testbench/ep# ** Warning: (vsim-3722) ./pci_test_chaining_testbench.v(655): [TFMPC] - Missing connection for port 'gen2_speed'.# ** Warning: (vsim-3722) ./pci_test_chaining_testbench.v(655): [TFMPC] - Missing connection for port 'tx_st_err0'.# ** Warning: (vsim-3017) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Too few port connections. Expected 186, found 175.# Region: /pci_test_chaining_testbench/ep/epmap# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'derr_cor_ext_rcv0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'derr_cor_ext_rpl'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'derr_rpl'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'ko_cpl_spc_vc0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'npd_alloc_1cred_vc0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'npd_cred_vio_vc0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'nph_alloc_1cred_vc0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'nph_cred_vio_vc0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'r2c_err0'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'reset_status'.# ** Warning: (vsim-3722) ../pci_test_example_chaining_pipen1b.v(799): [TFMPC] - Missing connection for port 'suc_spd_neg'.# ** Warning: (vsim-3017) ../../../pci_test.v(978): [TFMPC] - Too few port connections. Expected 39, found 36.# Region: /pci_test_chaining_testbench/ep/epmap/serdes# ** Warning: (vsim-3722) ../../../pci_test.v(978): [TFMPC] - Missing connection for port 'coreclkout'.# ** Warning: (vsim-3722) ../../../pci_test.v(978): [TFMPC] - Missing connection for port 'rx_patterndetect'.# ** Warning: (vsim-3722) ../../../pci_test.v(978): [TFMPC] - Missing connection for port 'rx_syncstatus'.# ** Warning: (vsim-3017) ../../../pci_test.v(1214): [TFMPC] - Too few port connections. Expected 243, found 231.# Region: /pci_test_chaining_testbench/ep/epmap/wrapper# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'avs_pcie_reconfig_readdata'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'avs_pcie_reconfig_readdatavalid'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'avs_pcie_reconfig_waitrequest'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'dprioreset'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'ev_128ns'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'ev_1us'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'int_status'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'serr_out'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'swdn_wake'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'swup_hotrst'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'use_pcie_reconfig'.# ** Warning: (vsim-3722) ../../../pci_test.v(1214): [TFMPC] - Missing connection for port 'wake_oen'.# ** Error: (vsim-3389) ../../../pci_test_core.vo(2483): Port 'extraclkout' not found in the connected module (83rd connection).# Region: /pci_test_chaining_testbench/ep/epmap/wrapper/n010ii# ** Error: (vsim-3389) ../../../pci_test_core.vo(2483): Port 'r2cerr0ext' not found in the connected module (114th connection).# Region: /pci_test_chaining_testbench/ep/epmap/wrapper/n010ii# ** Error: (vsim-3389) ../../../pci_test_core.vo(2483): Port 'successspeednegoint' not found in the connected module (159th connection).# Region: /pci_test_chaining_testbench/ep/epmap/wrapper/n010ii# ** Fatal: (vsim-3365) ../../../pci_test_core.vo(2483): Too many port connections. Expected 219, found 222.# Time: 0 ps Iteration: 0 Instance: /pci_test_chaining_testbench/ep/epmap/wrapper/n010ii File: C:/tools/altera/91/modelsim_ase/win32aloem/../altera/verilog/src/stratixiv_pcie_hip_atoms.v# FATAL ERROR while loading design# Error loading design --- Quote End ---