PCIe Hard IP MSI Interrupt handling

I have read the PCIe user guide and I found that the signal app_msi_req produces the interrupts to pci express.

Also I check the followed registers that are responsible for generating msi interrupts:

1. Set the MSI Enable at bit[0] of MSI Control Status register, this bit is mapped to bit[16] of configuration space register offset 0x50.

2. Set the Interrupt Disable at bit[10] of Command Register at configuration space offset register 0x4 to disable legacy interrupt.

3. Set the Bus Master at bit[2] of Command Register at configuration space offset register 0x4 to enable the ability to generate MSI message.

Every 1 sec I enable the app_msi_req inorder to see every 1 sec interrupts in my driver.

app _msi_tc and app_msi_num assigned to zero.

Still I can not see interrupts in my driver. The interrupt handler is not called.

I would like to ask:

1) What should I check more? Do I miss something important?

2) How can I simulate this desing to check if I get app_msi_ack=1 ??

3) Should I change more signals?

Thanks in Advance!