PCIe Hard IP MSI Interrupt handling

I am not talking about MSI-X, but the simple MSI. So the driver would configure the MSI capability structure at Config Space Address 0x050 ..0x5C.

0x050 Message Control, Configuration MSI Control Status Register Field Descriptions, Next Cap Ptr, Capability ID

0x054 Message Address

0x058 Message Upper Address

0x05C Message Data

So, in QSys you have multiple devices connected which can interrupt the PCIe endpoint core (upto 16). My requirement is

- Know the source of the interrupt (which device triggered it) without going to go back and read the interrupt status register (CRA - 0x40)

- Pass specific data along with MSI packet as the message. Is that possible?

- What is the purpose of Message Data (in Config Space 0x5C) ? Is that something you can use to pass specific data from the endpoint core by the individual device?

- The Message Address (0x54 ) is the system memory address where it would write the data specified in 0x5c?