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Altera_Forum
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16 years ago

PCIe Hard IP Configuration Question

I'm simulating the SOPC variation of the testbench that the PCIe Compiler creates so that I can see how the BFM is configuring the PCIe IP. I see several testbench messages like "INFO: 37192 ns EP...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I'm running ModelSim 6.5d. If you are doing an SOPC design there will be a setup_sim.do. This creates some aliases like c, s, w.. I had some issues with this flow compiling all of the Altera libs into my work lib. It takes a very long time. There are some ways to speed it up..