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Altera_Forum's avatar
Altera_Forum
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12 years ago

PCIe Gen3 on DE5-net/Stratix V board

Hi All, I've been trying to create a simple design using the Stratix V PCIe 3.0 x8 core with an Avalon-ST interface. I can compile my design, and load it onto the FPGA, but link training fails...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Some additional sharing, for Stratix V PCIe 3.0 x8 core with Avalon-ST interface, make sure to instantiate the Reconfig Driver in the design. Otherwise link downtrain may also occur.

The requirement to add the Reconfig Driver was mentioned in the Stratix V PCIe Hard IP user guide.