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Altera_Forum
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14 years ago

PCIe core LTSSM signals

Hi guys, I've observed some "weird" issue today. I'm pulling Test_out[4:0] out to my Logic so that I can read them as system status. When I do that I have intermittent link training issue. D...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Further probe made me see that the Detect Sequence during Detect.Active substate is not carried out. Somehow, Mr Arria II doesn't output the Voltage stepping and detect the far-end device.... :| frustrated !!!