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Altera_Forum's avatar
Altera_Forum
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14 years ago

PCIe bus master random access to all host memory

I'm not sure if the PCI Express MegaCore hard IP can do what I want. I'll describe what I'm trying to achieve. I'd like to set up a bus-master scatter-gather DMA between on-device memory and a ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

To be honest, I'm not entirely sure what the address translation tables are actually translating, as each entry only contains one 64-bit address rather than say a PCI address and a matching local address. Since the areas mapped by each table entry are all the same size, I'm guessing that consecutive table entries map to consecutive regions of local address space starting at some local base address.

(EDIT: To avoid any confusion, my device is normally a PCI target except during bus-master DMA operations. I.e. it's like a PCI plug-in peripheral card for a PC.)