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Altera_Forum's avatar
Altera_Forum
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16 years ago

PCI Express Tx interface gets stalled

Hi, I'm still trying to send data (A/D samples) from my PCI Express endpoint (S4 GX Dev. Kit. -> Hard IP) to the root port memory (RAM). I'm able to receive data from the root port, and also...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi,

I still couldn't fix the problem.

I've now changed the payload size to 129 DW (since I'm using a 3 DW Header, because the addr. I'm writing to is 32 Bit, and thus a 4 DW header mustn't be used). The strange thing is that now the Tx ready signal from the Megafunction goes low although there are still posted data credits left. But I never get any credits back which indicates that there is still something wrong. I checked the generated messages, and they should be okay (not malformed).

How can I determine if/for what reason the root port dropped a packet (unfortunately I don't have a PCI Express protocol analyzer handy)?

I'm using Jungo WinDriver to develop the driver for the host PC.