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Altera_Forum's avatar
Altera_Forum
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12 years ago

PCI express Stratix IV implementation

Hi there, I'm using a Stratix IV GX and i want to use the PCI express link to transmit data from my FPGA to another one. The data which have to be sent are generated by a personnal IP and no ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hey tricky,

Thanks for your reply i take your advice but if it's possible i'd rather not use the avalon bus.:)

Yes i went trought the user guide, and i have seen that a "descriptor/data" can be configured instead of the avalon interface. It may be my solution don't you think ?

I have generated the vhdl files of the PCIexpress Soft IP using this "descriptor/data" with Mega Wizard and now i'm looking at all the I/O signals of this IP.

I supposed that i have to link a lot of them and not only "tx_data, tx_desc, rx_data, rx_desc", what do you think ?

But by the way, i had to configure BAR registers in mega wizard but i don't think that i need them since i don't want to work with any "memory location".

Thank you for any advice.

Best,

Alexis