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there must be also an address mapping between the pci express and my os on the host pc. when i want to serve i/o s from that os i don´t know which base address (or offset address) i have to write to from outside the fpga to reach the appropriate i/o. :confused:
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That is the purpose of the BAR registers in the PCI/PCIe configuration space. When your computer boots, the BIOS writes the base address of the BAR as seen by the host CPU, eg., an x86 CPU.
If you are using Linux, you can list these addresses using lspci. If you are using Windows, you can use PCITree. Linux has a default device driver you can use to perform read/write accesses to BAR registers. I don't write Windows drivers, so you are on your own there. I guess most people use the Jungo driver support.
If you want to see an example of the output of lspci for a Qsys PCIe bridge, look at the document I link to in this thread:
http://www.alteraforum.com/forum/showthread.php?t=35678 In the zip file under the code/ folder is a program called pci_debug that lets you access the PCIe BARs under Linux.
Cheers,
Dave
Honored Contributor
