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Altera_Forum's avatar
Altera_Forum
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8 years ago

On Board RAM and Native PHY Transceiver Core

Hello Everyone! I am trying to implement a transmitter by using Stratix V GT Evaluation Board. I am using 4 channel and 1 Native PHY IPCORE. The data which will be transmitted comes from an ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

I believe you mean onchip ram (rather than onboard ram).

It could be timing problem on mux or memory editor bug or your testing.

Try mif in each of four rams to bypass editor prblems