Not able modify testbench BFM Intel P tile PCIE avmm example design on Stratix 10DX device

Question

Hi all,
    I ran PCIE Gen4x16 ptile avmm example design while running it and I got the VCS report which i attach it.
In that report, I analyze the report and i noticed that "upstream component can't be backpressed".
I attach the snapshot of that 
can you please clarify the below questions:
       1.Testcase flow of PCIe BFM. How to execute different tests?(Which Modules need to look )
       2.Need procedure for Testing Memory write and Read (32- and 64-bit address) TLP's.
       3.How to configure the Descriptor for DMA modes(Write and Read) in PCIE RC BFM?
 
Thanks in Advance
Indirapriya

rahul_s_intel1 · Answer

Hi Indira Priya ,
 Kindly find page no: 5 of the below document 
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-ptile-pcie-avmm.pdf

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Not able modify testbench BFM Intel P tile PCIE avmm example design on Stratix 10DX device

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