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Altera_Forum's avatar
Altera_Forum
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17 years ago

Nios CPU read FIFO

Hi, all I'm trying to use Nios CPU to read data from a FIFO via Avalon interface. However, when I read data through a pointer which points to the FIFO base address, the data are constant and th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

My Nios II CPU has 64kB instruction/data cache since I would like to have a high implementation speed. The burst mode is also enabled. It reads the FIFO data using a pointer which points to the FIFO base address.

I will try your suggestion. Thanks! However, I'm confused about the address issue. In my understanding, operating a FIFO has nothing to do with the address.