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Altera_Forum
Honored Contributor
Honored ContributorNew IP development
Hello, I am interested in developing some instructions which can do the bignum operations (like adding two operands of 1024 bit) and hence by plan to implement a simple Full Adder like this: ...
Altera_ForumHonored Contributor
Honored ContributorHello,
Really appreciate for the response. --- Quote Start --- If you only have a handful of operands you want to use (but frequently), then you could possibly look into using dual port onchip memory, with the NIOS/SGDMA on one port for reading/writing results, and the other port dedicated for your Avalon-MM Master to use. If it will fit in your device, a RAM width of 1024-bits might provide the highest throughput. --- Quote End --- Akhil>> I did not clearly understand the above concept. is it possible for you to explain it please? --- Quote Start --- As far as how to control your new IP, you could do something like add custom instructions which take 32-bit addresses (pointers) to the operands which your new logic would independently fetch/store results. --- Quote End --- Akhil>> I did not clearly understand the above as well. is it possible for you to explain it please? Best, Akhil
