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Honored Contributor
Honored Contributormultiple xaui interfaces
Does anyone have a suggestion for telling quartus that multiple xaui interfaces (using the A2GX hard xaui ip) all receive a refclk from the same clock, and thus all the xgmii_rx/tx_clk signals should...
Altera_ForumHonored Contributor
Honored ContributorThanks for the reply.
For now, I'll stick on using only one channel of the board. About the magic numbers, I was wrong about not using it when there is no loopback. It is necessary anyway. --- Quote Start --- Sorry for the wait, I was out of the office for a few weeks. I was using the XAUI hard PCS on an Arria II GX, so it might be a little different (haven't done anything with any of the V series parts). I can't share much of the project, but for clocking I feed the recovered rx clock into the tx clock, and the board's refclk input into the pll_ref_clk input, and feed in a low speed phy management clock, with the proper transceiver reset controller. Good luck --- Quote End ---
