Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

multiple xaui interfaces

Does anyone have a suggestion for telling quartus that multiple xaui interfaces (using the A2GX hard xaui ip) all receive a refclk from the same clock, and thus all the xgmii_rx/tx_clk signals should...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Forgot to add: I do realize the xaui phy ip core does have a xgmii_tx_clk input port, but if I feed it with a clock that is not it's own xgmii_rx_clk, I get timing violations with the core's internal reset.

Thanks