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Altera_Forum
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9 years ago

Multichannel Fir Compiler ii problem.

Dear Sirs and Madams, I have some problem with Fir Compiler II. When i set max number of channels 2, Clock Rate 120MHz and Input Sample Rate 60MSPS filter works perfect but when i change input s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Dear Sirs,

problem solved with service request help.

Problem was in reset_n signal. After power up filter must be reseted! Also after filter reset we need to wait few clock cycle before we assert sink_SOP signal.

Best regards

Adam