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Altera_Forum
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11 years ago

MSI-X Interrupts not aligning to 32-bit boundary

We are having a problem issuing MSI-X interrupts. We are running a Cyclone V HIP PCIE 1x1 on a 64-bit Linux machine in 64-bit data/64-bit addressing mode. I generate the interrupt to the address sp...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Maybe because PCIe is basically a 64bit interface?

Certainly a normal 32bit data write is a 64bit transfer with only 4 (of 8) byte enables asserted.