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Altera_Forum's avatar
Altera_Forum
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9 years ago

mSG-DMA IRQ could not be cleared

Hi, I encountered the case that the IRQ bit in mSG-DMA status could not be cleared. I supplied descriptors for the MM-ST direction. The transfer size is small as 256Bytes. Every descriptor gener...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

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I read out the fill level to calculate the number of descriptors that can be

sent. I do not think overrun occurred.

No parks are used.

I just wanted to measure the transfer performance and to know the relation

between the size per a descriptor and the total performance.

So I sent simple but interruption enabling descriptors as many as the FIFO was

available and repeated that. If the FIFO gets full, the task sleeps until an

interruption occurrs.

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I forgot the answers.

No overrun and no underfill.

Just single transfer and no parks.