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Altera_Forum
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11 years ago

Modular SGDMA - Streaming to Memory Mapped Random first write.

Hi, I am using the Modular SGDMA to write memory into DDR3 memory, and then a second one to read it back out again. The reading is all working fine and writing into the memory works as well, ex...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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Hmm, it seems to work fine (exact same setup) in simulation, but not in implementation.

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At least that tells you something ... :)

Are you able to compare all the Avalon-MM signals from SignalTap II traces with exactly the same traces from the simulation, i.e., probe the bus signals at the SGDMA controller, rather than at the BFM, just in case the Avalon-MM fabric has the bug ... but its not affecting your simulation for some as-yet-undetermined reason?

Cheers,

Dave