Forum Discussion
Altera_Forum
Honored Contributor
12 years agoModify Ariia V ALTLVDS_TX data rate during work
Hello everyone, I'll try to explain the issue as clear as I can. I have a block which can operate at 2 different clock rates : 162 MHz and 270 MHz. I need to use ALTLVDS_TX with serialization ...
Altera_Forum
Honored Contributor
12 years agoI'm implementing DisplayPort protocol and it requires 1.62/2.7 Gbps differential pair .That's why I though of LVDS