Honored Contributor
Honored ContributorYou must compile all files listed in the msim_setup.tcl to run your custom testbench. They are not only for the TSE’s testbench. This is because altera_tse_mac.v calls many sub-modules in *_sim folder and device specific primitives in Quartus II install folders. You can find the file list in the msim_setup.tcl and can copy them to your script. But the easiest way is calling the msim_setup.tcl in your script as I described before.
If I run your testbench, and if the target device is Arria V, I will do this. vlib work vlib design vmap work design vcom -work design -f lib.dgn vcom -work work -f lib.dgn # vlog -work work ../../design/altera_tse_reset_synchronizer.v # vlog -work work ../../design/altera_tse_top_gen_host.v # vlog -work work ../../design/altera_tse_mac.v # Triple Speed Ethernet MAC source ./../altera_tse_sim/mentor/msim_setup.tcl set QSYS_SIMDIR "./../altera_tse_sim/" set QUARTUS_INSTALL_DIR "c:/altera/13.1/quartus/" # Compile device library files dev_com # Compile the design files in correct order com vcom -2008 -work work -f rtl.dgn vcom -2008 -work work -f tb.dgn vcom -2008 -work work ../tests/IF_FPGA_TS.vhd # vsim work.IF_FPGA_TB -l IF_FPGA_TEST.log -do msim.do -c -quiet -t 1ps vsim -L work -L work_lib -L i_tse_mac -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L arriav_ver -L arriav_hssi_ver -L arriav_pcie_hip_ver work.IF_FPGA_TB -l IF_FPGA_TEST.log -do msim.do -c -quiet -t 1ps move IF_FPGA_TEST.log ../logs/IF_FPGA_TEST.log move vsim.wlf ../waves/IF_FPGA_TEST.wlf Please remember necessary files must be placed in proper folders the msim_setup.tcl refers to.
