Migrating Triple Speed Ethernet from Cyclone 3 to Cyclone 5

Hello,

I have been assigned a project where a TSE MAC was generated via the "Triple Speed Ethernet 9.0" IP using Quartus II v11.1 on a Cyclone III FPGA.

Our company would like to reproduce the exact same behavior as the aforementioned block in a more recent version of Quartus , but targeting a different FPGA (Cyclone V), given that the v11.1 does not seem to be available for download anymore.

I have been trying to manually migrate the IP but I have a huge concern regarding one of the configuration parameters for the TSE MAC.
In particular, our old sopc shows

<parameter name="transceiver_type" value="GXB" />

After verifying that the "altera_eth_TSE" does not allow for different transceiver types in the related drop-down menu, I have started wondering whether my issue is just related to this Core or it involves some transceiver placement differences between the two boards.

I have been trying to find the "UG-01008" for TSE MAC 9.0 but that is also unavailable, same as the old version of Quartus.

Would it be possible to get some clarifications on the GXB differences, IP Portability or core characterization?

As a means of speeding up the support process, I will upload the portions of .sopc regarding the core between the old one and what we have tried implementing on the new one, you will see major differences.