Occasional Contributor
Occasional ContributorI'm uploading a report showing the results of our tests for 64 channels and 65 channels using the example design with settings for 256 channel support. Also, the example design driver is used.
regards,
Greg
Regular ContributorHi @grspbr ,
If refer to the user guide, there is a 1.2. Known Issues
Where if setting Multichannel D2H AVST configuration has stability issues when total number of D2H channels configured is greater than 256. Please consider this in your design.
Also, if refer to 3.1.6.1. Avalon-ST 1-Port Mode
Hope this answer your question.
Regards,
Wincent_Intel
Occasional ContributorNote that we are not exceeding 256 channels. We are trying to use more than 64 channels though. When we try 65 channels, for example, we get a hang up in the PC. We think that the 64 limit on descriptor prefetch may not be handled properly, either in our code or the example driver so we are looking at that right now.
regards,
Greg
Regular ContributorHi,
Yes, you are correct. there is limit on descriptor prefetch as per stated in the user guide.
Please consider it in your design .
Regards,
Wincent_Intel
Occasional ContributorThe documentation is lacking here. There are 2K physical channels - i.e. 11 bits of physical address on the core for channel ID - yet we can only build a MCDMA with 256 channels, and yet again we only have 64 descriptor prefetch buffers. We don't find any documentation on how to address the 256 channels with 64 prefetch buffers. There needs to be a mapping of the prefetch buffer to a physical channel but we find no documentation for this in the software or hardware references. So how do we use 256 channels? We want this because we have a 256 channel AVST interconnect in our design.
Regards,
Greg
