Forum Discussion
SLabe
Occasional Contributor
4 years agoHi I'm using the following section of the UG for running the simulation:
I do know the guide is out of date and an update is coming for 21.1...
In Quartus 21.1 I generate the example design for Multi Channel DMA P-Tile for PCI Express everything left as is targeting the Agilex F-Series P-Tile ES0 development kit. I've tried with both "PIO using MQDMA Bypass mode" and "AVMM DMA" examples.
One final note, I use ModelSim FPGA Edition for simulation.
Thank you,