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Altera_Forum
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15 years ago

Marvell 88E1111 PHY question

I am using cycloneIII board with Marvell PHY RGMII interface. After searched around forum, I found suggestions that in order to receive frames successfully, the bit7 of mdio register 20 should be set...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

No, it depends on how you specify the timing requirements on the FPGA side.