Honored ContributorHi all, I have a question.
I have a design using lvds interface. Currently it is implemented with ALTDDR_in IP but no ALTLVDS. The input of ddr_in is mapped to a pin labeled with LVDS in pin assignment. Now I see something about the ALTLVDS IP, and it can be used with the same function as ddr_in. I wonder which way is more efficient, in the power point of view. Thanks~~~~~~~~~~:)
Honored ContributorWhat's your SERDES rate? If it's /1 or /2, then the altlvds megafunction will build it's logic out of the altddio primitives, and it's essentially the same thing. If it's a larger factor, say /4, then the dedicated LVDS logic is used. It will have better timing margins and dedicated for LVDS. (From a power point of view, I'm guessing it should be lower power, but probably not in a measurable manner. They're both using dedicated structures in the silicon, and should be insignificant in the grand scheme of things.)
Honored Contributoryes it is /2. Thank you for your explanation.
:)Honored ContributorDedicated SERDES hardware is only provided with Stratix and Arria FPGAs. On Cyclone chips, ALTD_LVDS uses software SERDES based on DDIO hardware.
Honored Contributor
