Linux device driver for Altera PCI Express Chaining DMA reference design

I recently started getting involved using an Altera Aria IIGX for an embedded design. I am using the PCIe with chaining DMA on the devel board to test out my Linux driver. I use the same techniques as the Linux driver posted here, but with a difference. We use high end server class PC's with lots of memory (8G or more), so we use the PAE kernel. This means that it is very possible that buffers needed for DMA exist above 4GB, so different calls must be used to assemble the SG list, specifically pci_dac_page_to_dma(), which provides the pages as a 64 bit entity (dma64_addr_t). All this works great except when programming a descriptor with any non-zero value in the upper address field of the descriptor table. The resulting DMA from the DMA engine should issue a 4DW read request providing a 64 bit address, however it does not, it still issues the 32 bit address 3DW read request instead. I have PCIe protocol analyzer traces to prove it. I have submitted this to Altera, but have not received an answer yet. This same type of problem would exist with a 64 bit kernel.