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Altera_Forum
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17 years ago

Legacy DDR compilation error

Hi, in a project I have been working on for a while this message suddenly appeared: Warning: Atom "DDR1:DDR1_ddr_sdram|DDR1_auk_ddr_sdram:DDR1_auk_ddr_sdram_inst|DDR1_auk_ddr_datapath:ddr_io|...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

by tuning the distances from the ddr to the fpga i was able to use the write clock as resynch clock. (In ver 8.1) I had a couple of ps to work with.