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Altera_Forum
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11 years ago

JESD IP core: Same link clock shared between all transciever lanes

Hi All, Is it possible to use a common external reference clock for L lanes transceivers in JESD 204 IP core??or do we need separate external reference clock for each sets of lane?? Thanks...
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Altera_Forum
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11 years ago

Hi Gowtham,

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Thanks for the info. I am doing a study about Arria V GZ transceivers and JESD IP core in the same tsw14j56evm.

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Great!

Have you tested any of the JESD204B IP yet? I have not. I first wanted to start with some simple transceiver based designs, and then see if I can interface to the JESD204B links directly, and create my own (free) IP.

Cheers,

Dave