Forum Discussion
Deshi_Intel
Regular Contributor
6 years agoHI,
For once, the clocking freq maybe different for different video resolution ?
- Have you try out with HDMI example design to rule out potential Quartus design issue first ?
- Does the HDMI RX get connected to other logic design insides FPGA core ? How do you rule out is it HDMI issue or other user logic issue ?
In short, you can also refer to HDMI user guide doc page 37 (table 15) for summary of different freq support for different TMDS data rate.
Thanks.
Regards,
dlim
- EZhan6 years ago
New Contributor
HI,
First, this RX interface was porting from the design example and can be used when 4K or 1080p situation. I suppose this may prove the logic is correct or not that wrong. Is that possible the reason is the special resolution issue? I upload the edid file, would you please help to check if it's a IP compatibility issue?