issuing memory write request from PCI Express endpoint

You can use the tl_cfg_xx signals. Look at section 5-31 (Configuration Space Signals - Hard IP Implementation) in the PCI Express User Guide. I'm using these to capture the requester ID in an Arria II GX hard macro design. The tl_cfg_ctl_wr signal toggles high/low every 8 ticks, and you just need to use both edges as a qualifier to know when to sample the tl_cfg_add tl_cfg_ctl. The information you need is at address 0xf.