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There is no need for PLL, you just needed decimation. Your truncation must keep the MSBs. The spikes should not occur but check your saturation internally or as test reduce input range or just use sine wave without mult.
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Hi Kaz,
I tested without the multiplier also and got similar result as with the multiplier. In the pipelined adder I have used pipelined stage to be 1 as I need to delayed the output of the adder and feed it to the other input of the adder. I think something is wrong with my design. This time is gave the sine input as 250 Hz without the multiplier so I should be expecting a sine wave of same frequency at the output but I got a dc with unusual spikes.
Honored Contributor
