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Altera_Forum
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9 years ago

Issue with CIC filter implementation using DSP builder.

Hi, I'm implementing a 2 stage CIC decimation(/1000) filter using the DSP builder but not using the CIC block rather using adder and substractor to implement it. As per my calculation the CIC f...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

There is no need for PLL, you just needed decimation. Your truncation must keep the MSBs. The spikes should not occur but check your saturation internally or as test reduce input range or just use sine wave without mult.