Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Issue with CIC filter implementation using DSP builder.

Hi, I'm implementing a 2 stage CIC decimation(/1000) filter using the DSP builder but not using the CIC block rather using adder and substractor to implement it. As per my calculation the CIC f...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

so your input sampled is at 100MHz(as 250KHz sine*cos), thus mult output is also sine wave at 100MHz (not dc).

your filter decimates by 1000 but where is that decimation?