Forum Discussion
Altera_Forum
Honored Contributor
15 years agoissue in SOPC: the PLL of the DDR2 HighPerformanceController cannot be synthesized
At the moment i try to set up a testsystem for my project. I found an example wich do exactly what i need for a testsystem at nioswiki.com/exampledesigns/nios2udpoffloadexample. I use the Stratix-II-...
Altera_Forum
Honored Contributor
15 years agoseems to be fixed in 10.1sp1. At version 9.1sp2 - 10.0 this example doesnt work on this board