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Altera_Forum
Honored Contributor
10 years agoIs there any way to initialize onchip-ram with auto-generated data instead of an .mif
Hello every one I have some puzzle in using altsyncram module, and I need your help! In my design, I want to initialize a altsyncram in a parameterized module. The data filling to ram should be ...
Altera_Forum
Honored Contributor
10 years agoWould readmemb or readmemh help? If you open a Verilog file in Quartus and go to Edit -> Insert Template -> Verilog -> Full Design, the rom and readmem examples might help.