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Altera_Forum
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9 years ago

Is there any way to initialize onchip-ram with auto-generated data instead of an .mif

Hello every one I have some puzzle in using altsyncram module, and I need your help! In my design, I want to initialize a altsyncram in a parameterized module. The data filling to ram should be ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Would readmemb or readmemh help? If you open a Verilog file in Quartus and go to Edit -> Insert Template -> Verilog -> Full Design, the rom and readmem examples might help.