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Altera_Forum's avatar
Altera_Forum
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16 years ago

Ip megafunction license

I have Quartus II, i have installed the evaluation trial 30 days. But in my project there are limitations with eda netlist generation and the pof file for the programmation of the FPGA (DE2 ALTE...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

you need to look at the schematics of your board what is also connected to that tristate bus.

if you only want to use the cfi flash then you can directly connect your ip to that memory and set all other signals to disabled for those other components that are also connected to that bus.

a cfi flash memory has no clock pin.