IP Core Resource Center for TSE, SDI, SPI4.2, PCIE, SRIO and 10GbE

Hi GuruDog,

Thank you for these documents.

Best regards,

Jeremy.

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Thank you for these useful links.

I do have a question though.

I downloaded and adapted the demo design for 10Gb Ethernet.

This demo design includes a verilog Ethernet frame generator, a verilog Ethernet frame monitor, and instantiates an example 10Gb Ethernet IP. Various loopbacks are available.

The demo design also includes a NIOS based SOPC system, but this is simply used for configuration (no OS, no TCP/IP stack).

With this design, I can (theoretically, at least!):

- test a single board of mine (using internal loopback)

- test 2 boards of mine (one sends and receives, the other one loops back)

Yet, I'd like to make a 3rd test. I would like to "ping" one of my board from a PC with minimum modification.

My question is: do I really need to implement an OS, a Niche style TCP/IP stack? Is it naive to believe I can simply loopback the frames received from the PC into the transmitter with minimum byte analyze and overrides (no software)? Is there a design reference or a tutorial applicable here?

Thank you in advance!

Jankzov

Hi GuruDog,

Thanks for the links. I downloaded Triple Speed Ethernet (TSE) ref design but it is not compiling in Quartus v9.1 and more over I am not able to generate SOF(Program files in v8.0). It would be great if some one can help me. Pls Pls Pls

Warning: Can't generate programming files for project because design file "C:/altera/tse_datapath_reference_design/tse_ref_design/crcgen_altcrc.v" is encrypted. It does not have license file support that allows generation of programming files.

Warning: Can't generate programming files for project because design file "C:/altera/tse_datapath_reference_design/tse_ref_design/crcchk_altcrc.v" is encrypted. It does not have license file support that allows generation of programming files.

Hi GuruDog,

The links are very helpful! Thank you very much.

How about SATA/SAS IPs? It seems that they should be at the same page.

I found one white paper and a couple of other Altera documents saying that SATA and SAS are supported. Then I tried Quartus II 9.1 and searched the IP directory and browsed the document directories, I could not find SATA and SAS like those you listed.

Any insights?

Thanks again,

Tom

hello all,

please create a new thread when you ask questions so everyone can see the title and try and help.

Tom, i don't think Altera has SATA or SAS cores, only their partners do.

Hi GuruDog,

Thank you for these documents.

Best regards,

jack hoa