IP core optimization

Altsyncram is a good example for the fact, that IP has to consider particular hardware properties. Internal RAM blocks are showing some implementation differences between FPGA families (e.g. which RAM ports are registered). Furthermore, not all internal RAM features are accessible from HDL (e.g. dual port with port width translation), an IP has to use Altera specific libraries to utilize it. If the IP is also intended for use with other vendor's FPGA, more differences come into play.