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Altera_Forum
Honored Contributor
Honored ContributorIP AltsyncRam -- Read/Write operations issue
Hi all, I have another issue using the RAM IP core generated with the MegaFunction wizard. Here's the entity of my RAM and its instanciation:
GENERIC(
ADDRESS_WIDTH : IN INTEGER ;
PIXE...
Altera_ForumHonored Contributor
Honored ContributorOK, when I run a pass of write accesses on every location of my RAM block, every read acces after that works perfectly fine. I don't have no 'X' values under ModelsIm anymore.
Thank you all, problem solved! :)
