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Altera_Forum
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16 years ago

IP AltsyncRam -- Read/Write operations issue

Hi all, I have another issue using the RAM IP core generated with the MegaFunction wizard. Here's the entity of my RAM and its instanciation: GENERIC( ADDRESS_WIDTH : IN INTEGER ; PIXE...
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Altera_Forum
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16 years ago

Thanks again kaz, I think I see what you mean know.

And it's pretty much what appears in Altera generated waveforms (which I joined). It takes one dummy read cycle, where outputs are 'X' and after that, one dummy write cycle (read of 000 and 001 addresses) and the outputs become valid.

However, after that dummy write cycle, is it OK to read anywhere in the RAM, or do you need to write everywhere (at every location) before reading everywhere?