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Rk_Athram's avatar
Rk_Athram
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

IO_STANDARD in Arria 10 2A Bank

Hi,

I am creating pin planning for Arria 10ax057,

i used 2A Bank for GPIO with 1.8V my compilation was successful.

in other requirement i have to use LVDS pins, so i removed few GPIO's and taken few 13 sets of LVDS signals, and rest are 1.8V.

Now my fitter is giving error.

Error(11702): I/O standard assignment ' 1.8 V' to pin FPGA_IO43 is not supported by the device. The name ' 1.8 V' is not a valid I/O standard name

before using LVDS pins from the bank, i faced no issues

Queries:

1) In single bank can i use both LVDS and 1.8V ? If not suggest the document where i can find this information

2)Is it only 2A bank, (as PCIe hard ip reset is used from 2A) or it is same for all banks.

Regards,

Rajesh

4 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    4 years ago

    How are you creating the assignment? Pin Planner? Assignment Editor? It looks like there's a space in front of 1.8 V that probably shouldn't be there.

    You can also try running I/O Assignment Analysis from the Processing menu or Pin Planner. That might provide more detail on the issue.

  • Rk_Athram's avatar
    Rk_Athram
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago

    Thank you for reply.

    as 2A bank is having configuration, and i used those as BIDIR . so it caused error.

    when configuration pins ignored/taken as input to design the issue is solved.

    Regards,

    Rajesh

    • AminT_Intel's avatar
      AminT_Intel
      Icon for Regular Contributor rankRegular Contributor
      4 years ago

      I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.