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Altera_Forum
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11 years ago

IO discrepancy between CIC 10.1 and 13.1

I'm upgrading IP and I see an IO mismatch between the output data widths of the CIC core generated in 10.1 versus the one from 13.1. The documentation for both shows the same formula for calculating...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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The design is interpolator for BOTH the 10.1 core and 13.1 core.

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in that case 46 bits represents the maximum bitwidth required at last integrator stage. any extra bit can be ignored and should not affect the result as you will truncate LSBs

to get your final gain.